Nowadays the most of integrated circuits (ICs) are created by designers using computer programs. Designers define the functionalities of the circuit and analyze them by using computer programs to obtain the electronic equivalent of a circuit diagram.
In order to convert the circuit diagram into a physical integrated circuit, a place and route tool is needed to arrange every electronic component and to construct the wiring to interconnect them for a design layout. Besides, the layers of the layout are to be fabricated as a set of photomask used in the photolithographic processing. Before translating the design layout into a photomask layout, the design layout will be processed by a inverse lithography method and then analyzed by another computer programs to ensure there is no wrong pattern or to modify the wrong patterns.
In the photolithography processing, the biggest problem is the image error due to the diffraction effect, but an optical proximity correction method or other prior methods can be used to compensate the distortions. For instance, the optical proximity correction method can correct the wrong patterns by scattering bars to overcome the problem caused by the diffraction effect.
A hierarchical method plays an important role for the inverse lithography method. This is because the hierarchical method can analyze the design layout to make a hierarchical structure having a plurality of design layout cells with different patterns. In addition, the hierarchical structure can also be used in the optical proximity correction method.
Please refer to FIG. 1, which shows a flow chart of a prior inverse lithography. It illustrates that inversing a design layout by a inverse lithography method to obtain a inversed design layout; smoothening the inversed design layout to obtain a photomask layout; and then verifying. FIG. 2(A) shows a design layout and FIG. 2(B) shows a photomask layout produced by a prior flow.
In the above prior flow, there is usually an existing problem that the unexpectedly different photomask patterns as FIG. 2(B) are produced even in the same design layout condition as FIG. 2(A). It may take much time for verifying the photomask layout once we have doubts about the photomask layout. In addition, using the wrong photomask may cause the yield to decrease. In the technology industry nowadays, the less wasted time the more competitiveness and the higher yield the higher productivity.
In order to overcome the drawbacks of the prior flow, the inventors research and experiment without giving up, and finally invent “Matching Method Of Pattern Layouts From Inverse Lithography” to overcome the drawbacks. The summary of the present invention is described as follows.